LATEST IN THE NEWS

April 22, 2025

Vellex Computing Exhibits at San Francisco Climate Week Deep Tech Expo

Vellex Computing exhibited its analog computing technology at the "Live From the Future! A Deep Tech Investor Expo" during San Francisco Climate Week, a showcase co-hosted by Activate, The Engine Ventures, and Breakthrough Energy Fellows.
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November 14, 2024

Vellex Computing Co-Founder Named 2024-2026 Mária Telkes Fellow

Dr. Palak Jain, CEO and co-founder of Vellex Computing, was named one of seven fellows in the 2024-2026 Mária Telkes Fellowship cohort, a program run jointly by the Cleantech Leaders Roundtable and the Clean Energy Business Network to advance underrepresented cleantech professionals into executive leadership.
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May 29, 2024

Vellex Computing Graduates from Creative Destruction Lab

Vellex Computing graduated from the Creative Destruction Lab (CDL) program at CDL Vancouver, completing four sessions with a network of entrepreneurs, investors, and mentors to advance its analog computing technology toward commercialization.
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OUR BLOGS

March 4, 2025

Navigating California’s Grid Interconnection Maze: Costs, Timelines, and the Future of Renewable Energy

Lani Nguyen
As California pushes toward its ambitious clean energy targets, developers face a major roadblock: interconnection delays and skyrocketing costs. Whether it’s a solar farm, wind project, or battery storage system, getting connected to the grid under interconnection processes like PG&E’s Rule 21, Wholesale Distribution Tariff (WDT), or CAISO’s GIDAP is more complex than ever.

OUR PUBLICATIONS

April, 2026

Automated Synthesis of Hardware-implementable Analog Circuits for Constrained Optimization

Sachin Khoja; Kamlesh Sawant; Palak Jain; Sairaj Dhople; Jason Poon
December, 2024

A hybrid-computing solution to nonlinear optimization problems

Kamlesh Sawant; Dillon Nguyen; Alex Liu; Jason Poon; Sairaj Dhople
Published in IEEE Transactions on Circuits and Systems I - Regular Papers, vol. 71, no. 12, pp. 6555-6568, Dec. 2024
May, 2022

Real-time selective harmonic minimization using a hybrid analog/digital computing method

Jason Poon; Mohit Sinha; Sairaj V. Dhople; Juan Rivas-Davila
Published in IEEE Transactions on Power Electronics, vol. 37, no. 5, pp. 5078-5088, May 2022